SN65LVDS104DR TI Signal Buffers, Repeaters, Splitters

The SN65LVDS104DR is a 1:4 LVDS clock fanout buffer from Texas Instruments designed for high-speed signal distribution in backplane and cable applications . It operates from a single 3.3V supply (3V to 3.6V) and features four LVDS outputs for distributing one LVDS clock or data input to up to four destinations . The device meets the ANSI EIA/TIA-644 LVDS standard with typical output voltage of 350mV into a 100Ω load and supports data rates up to 400 Mbps or clock frequencies up to 400 MHz . Key specifications include propagation delay of 3.1ns (typical), supply current of 35mA, bus-pin ESD protection exceeding 16 kV, and driver outputs that are high-impedance when disabled or with VCC <1.5V . Housed in a 16-pin SOIC (D) package (9.9mm × 3.91mm) , it operates over -40°C to 85°C . Applications include clock and data distribution in telecom infrastructure, networking equipment, base stations, high-speed backplane signal fanout, and any system requiring LVDS signal buffering and distribution with low skew. In stock at HL Electronics – request a quote for fast delivery.